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This bean emulates the behavior of an I2C master by SW means.
Any CPU can be used with this bean - the only requirement is
it must have 2 free general I/O pins.
Features of Master:
- Single master communication only
- No bus error detection provided
- The combined format of communication possible
- No wait state initiated when a slave device holds the SCL line low
- 7-bit slave addressing (10-bit addressing can be made as well)
Features of Slave:
- General call address detection not provided
- The combined format of communication not provided
- The stop condition detectiontion not provided
- 7-bit slave addressing
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Code:
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UAAA-7.x
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Bean
version: |
01.096
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Date:
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2002/07/31
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Driver version:
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03.03
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Languages:
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ANSI-C |
PE/IDE
versions:
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2.70(16LX)
2.87/2.96
(HC(S)08)
2.90/3.11
(HCS12)
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Compilers:
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Softune C-complierV30L24,
Metrowerks HC(S)08 C Compiler
V5.0.16
Metrowerks HC12 C Compiler
V5.0.21
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MCUs:
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Fujitsu 16LX family:
MB90497,
MB90497G, MB90F497, MB90F497G,
MB90543, MB90543G, MB90F543, MB90F543G,
MB90546, MB90546G, MB90F546, MB90F546G,
MB90548, MB90548G, MB90F548, MB90F548G,
MB90549, MB90549G, MB90F549, MB90F549G,
Freescale HC(S)08/HCS12 |
Note: The UAAA-7.1 bean is already included in the
installation of Processor Expert for Freescale.
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