• Errors for some combinations of cpu speed mode setting for derivatives with MCG module have been fixed . (#4744)

• Fix in TimerInt driver, parametr type of internal method SetCV has been fixed when using TimerInt bean with MTIMmod source. (#4717)

• Definition of relocated interrupt vector table has been fixed (for DevInit project and for PE project with disabled prm file generation). (#4378)

• Fix in PWM driver, support of T1CH2 channel in buffered mode has been fixed. (#3965)
• Fix in Init_ADC for QL4 derivative, initial channel selection has been fixed. (#3484)

• Fix in ADC driver and knowledge database - incorrect initialization of APCTL register for QG8/GQ4 in 16pin package has been fixed (#3323).
• Fix in Init_ADC and Init_KBI bean, names of QC16 derivatives used in CPU conditional groups have been fixed (#3337)

• Fix in AsynchroSerial driver in the InterruptRx - the OnFullRxBuf event wasn't called with the RTS enabled (#3171).
• Fix in ADC driver and knowledge database - incorrect initialization of APCTL register for QG8/GQ4 in 16pin package has been fixed (#3323).
• The pin pull-up control of the port B on MC9S08QG4_16_QFN has been fixed implemented. Instead of the PTBPE register the KBIPE register was used (#3173).
• Fix in Init_ADC and Init_KBI bean, names of QC16 derivatives used in CPU conditional groups have been fixed (#3337).

This package requires previous patch for the version 2.97.01 to be installed!

• Internal error displayed in Low and Slow speed mode if the 'FLL ref. clock divider' property set to a value other then 'Auto select' and FLL mode property set to 'FLL Bypassed' or 'Bypassed Low-Power' has been fixed (#3133).
• Fix in PPG driver, problem with the TPMXCLK as the clock source for PPG bean has been fixed (#3139).

This package requires previous patch for the version 2.97.01 to be installed!

• Fix in CPU database for GP32 derivatives, the problem with "INT_SCIError" interrupt vector selection has been fixed (#3041).
• Settings of PLL mult. factor N for AB16A,AB32,AZ32,AZ32A,AZ60,AS60A,AZ60A,MR8,MR32 derivatives have been fixed (#3073).

!!! It is necessary to install CW08 V5.0 Patch 1 before (from Freescale website).

• Fix in Init_MSCAN bean, the timing derived from oscillator clock has been fixed. Added division by 2. (#2171)

• Fix in Init_MSCAN bean, the timing derived from oscillator clock has been fixed. Added division by 2 (#2171).
• Fix in PWM driver for HCS08 derivatives, the ISR generation has been fixed (#1690).
• Fix in common file, problem in incorrect optimization on buffer length has been fixed.

• Fix in AsynchoSerial, AsynchroMaster and AsynchroSlave drivers, the RecvChar method (wrong initialization of a temporary variable in buffered mode) has been fixed. (#1851)

• Fix in main HC08 CPU driver, the initialization of the CONFIG2 register corrected (#1412, #1754)
• Fix in LJ12 and LK24 CPU beans, the "STOP instruction enabled" and the "Recovery from Stop mode" properties added (#1623)
• Fix in PWM driver
  • the function prototype generation for PWM interrupts corrected (#1690)
  • the SetRatio16 method for 100% and 0% duty corrected (#1386)
• Fix in main HCS08 CPU driver
  • the bug of shared interrupt vectors definition in the interrupt table fixed (#1690)
  • the initialization of non-volatile flash control registers corrected
• Fix in ADC shared driver, error when using one channel and multiple measurement fixed (#1764)
• Fix in PE Plugin, error when renaming an Event module fixed (#1812)

• Fix in CPU driver, the initialization of external oscillator has been corrected in the CONFIG2 register (#1412)

• Fix in AsynchroSerial, AsynchroMaster and AsynchroSlave driver, the interruptRx routine and the interruptError routine have been corrected. (#1267)
• Fix in main CPU driver, the setting of FPROT register has been corrected. (#1269)
• Fix in PWM driver, the output signal for SetRatio16(0xFFFF) has been corrected. (#1417)

• Fix in main CPU driver, The LVI settings have been corrected for SR12 and GZ16 derivatives (#1115)
• Fix in CPU CHG file for GR16 derivatives, the PLL input frequency range has been corrected (#1158)
• Fix in main CPU driver, the generating of the PRM files has been corrected for disabled memory areas (1175)

• Fix in main CPU driver, the initialization of the ICG range bit has been corrected for FLL bypassed external modes (#964)
• Fix in main CPU driver, the setting of FPROT register has been corrected (#1085)

• Fix in CPU database for EY16, the order of ESCI interrupt vectors has been changed according to the latest datasheet (#808)
• Fix in main CPU driver, the initialization of CONFIG1 register (LVI5OR3 and LVIRSTD bits) has been corrected for QT/QY derivatives (#874)

• Fix in main CPU driver, the initialization of CONFIG2 register (MSCAN Disable bit) has been changed for AZ60/AZ60A derivatives (#806)
• Fix in MotorolaCAN driver for AZ60A, SetAcceptanceCode method corrected, reset of the peripheral added to SetAcceptanceMode method (#805, #807)
• Fix in CPU database for AZ60A, the EE2ACR register address has been corrected (#804)
• Fix in CPU database for AS60A, the EE2ACR, EE2CR, EE2NVR register addresses have been corrected (#820)

• Fix in main CPU driver, the initialization of the MOR register has been corrected (#601)
• Fix in IO map for QY2, QY4 derivatives (#717)
• Fix in WatchDog driver, the Rate selection for AB16, AB32 derivatives corrected (#718)

• Fix in PWM bean - INTERNAL ERROR "Register "TBCH2" is not supported in buffered mode..." corrected (#545)

• Add support for Class and Vendor requests in USB bean (#426)
• Fix in KBI bean
    - EnEvent variable declaration corrected - variable exported to the header file (#483)
    - GetStatus method corrected - flag is cleared only if previously detected as set (#484)
• Fix in CPU bean for HC908EY16 that allows ability to use Internal Clock Generator with PLL now (#400) - from 2.91.01 patch
• Fix in IntFLASH bean, virtual page write did not write data value 4 (#427) - from 2.91.01 patch

The Beans are licenced for users of CodeWarrior Standard and Higher edition. There are the following beans available for download:
(see details here).

Download here.

• LCD bean
  - the Backplane pins and Frontplane pins properties added.
  - driver bug fixed
• SWSPI bean updated
• ExternalI2C bean added
• SWSPIMaster template updated
• SPIMaster template updated
• External_I2C template added

These beans support also Freescale HCS12 family for future version of Processor Expert.

The updated following beans support now also future version of Processor Expert for Freescale HCS12 family:

There are the following new beans available for free download:

The updated following beans support now also future version of Processor Expert for Freescale HCS12 family:

• Supported Bean Wizard
• Supported XTAL 32.768kHz
• SWSPI added as Basic Beans
• Minor bug fixed

How to install

To install this patch for the Processor Expert 2.86 CW Plug-in for Freescale HC(S)08 family,
it is necessary to unpack the appropriate zip package to your CodeWarrior directory. The package contains all necessary files to patch the Plug-in.

Default location of the Metrowerks CodeWarrior application:
drive:\Program Files\Metrowerks\CodeWarrior HC08_V2.0\

Unpack the content of the package to the directory over the existing files.

There are the following beans available for free download:

Download here.